Medium-energy ion irradiation of Si and Ge wafers: studies of surface nanopatterning and signature of recrystallization in 100 keV Kr+bombarded a-Si

We report new and exciting experimental results on ion-induced nanopatterning of a-Si and a-Ge surfaces. The crystalline Si (100) and Ge (100) wafers were amorphized and an a/c interface was developed by pre-irradiation with a 50 keV Ar+ beam at normal incidence with an ion fluence of 5.0 × 1015 ions cm−2. These amorphized surfaces were post-irradiated with Ar+ and Kr+ beams at an angle of 60°. The post irradiation was done with ion fluences of 1.0 × 1017 ions cm−2. For each beam, two energies (50 and 200 keV for Ar+, 100 and 250 keV for Kr+) were chosen to ensure ion stopping in both sides of the a/c interface. Regular nanopatterning (in the form of ripples) is observed on the Ge surface only with the post irradiation of the Kr+ beam. The Si surface showed regular nanopatterning with the irradiation of both beams with two energies. For the ion beams crossing the a/c interface, ripples of higher amplitude and longer wavelength were formed. Further, the irradiation with a heavy beam yielded surface ripples of relatively larger amplitudes. The Raman measurements confirm amorphization of the pre-irradiated surfaces. Surprisingly, the post-irradiated Si surface with the 100 keV Kr+ beam showed evidence of recrystallization. In the paper we discuss the physics at the interface and explain the experimental findings.

Source:IOPscience

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Electrical properties of Si/Si bonded wafers based on an amorphous Ge interlayer

An amorphous Ge intermediate layer is introduced into the Si bonded interface to lower the annealing temperature and achieve good electrical characteristics. The interface and electrical characteristics of n-Si/n-Si and p-Si/n-Si junctions manufactured by low-temperature wafer bonding based on a thin amorphous Ge are investigated. It is found that the bubble density tremendously decreases when the a-Ge film is not immersed in DI water. This is due to the decrease of the −OH groups. In addition, when the samples are annealed at 400 °C for 20 h, the bubbles totally disappear. This can be explained by the appearance of the polycrystalline Ge (absorption of H2) at the bonded interface. The junction resistance of the n-Si/n-Si bonded wafers decreases with the increase of the annealing temperature. This is consistent with the recrystallization of the a-Ge when high-temperature annealing is conducted. The carrier transport of the Si-based PN junction annealed at 350 °C is consistent with the trap-assisted tunneling model and that annealed at 400 °C is related to the carrier recombination model.

Source:IOPscience

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Fabrication of Ge-on-insulator wafers by Smart-CutTM with thermal management for undamaged donor Ge wafers

Newly engineered substrates consisting of semiconductor-on-insulator are gaining much attention as starting materials for the subsequent transfer of semiconductor nanomembranes via selective etching of the insulating layer. Germanium-on-insulator (GeOI) substrates are critically important because of the versatile applications of Ge nanomembranes (Ge NMs) toward electronic and optoelectronic devices. Among various fabrication techniques, the Smart-CutTM technique is more attractive than other methods because a high temperature annealing process can be avoided. Another advantage of Smart-CutTM is the reusability of the donor Ge wafer. However, it is very difficult to realize an undamaged Ge wafer because there exists a large mismatch in the coefficient of thermal expansion among the layers. Although an undamaged donor Ge wafer is a prerequisite for its reuse, research related to this issue has not yet been reported. Here we report the fabrication of 4-inch GeOI substrates using the direct wafer bonding and Smart-CutTM process with a low thermal budget. In addition, a thermo-mechanical simulation of GeOI was performed by COMSOL to analyze induced thermal stress in each layer of GeOI. Crack-free donor Ge wafers were obtained by annealing at 250 °C for 10 h. Raman spectroscopy and x-ray diffraction (XRD) indicated similarly favorable crystalline quality of the Ge layer in GeOI compared to that of bulk Ge. In addition, Ge p-n diodes using transferred Ge NM indicate a clear rectifying behavior with an on and off current ratio of 500 at ±1 V. This demonstration offers great promise for high performance transferrable Ge NM-based device applications.

Source:IOPscience

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Al-induced crystallization of amorphous Ge thin films on conducting layer coated glass substrates

The effect of the underlayer on the Al-induced crystallized (AIC) Ge thin film is investigated to achieve a high-quality Ge layer on a conducting-layer-coated glass substrate. We found that the crystal orientation and the grain size of the AIC-Ge layer strongly depend on the underlayer material. We explain that this phenomenon is related to the interfacial energy between Ge and the underlayer material and/or the crystal property of the underlayer material, since the Ge nucleation likely occurs at the interface under the growth condition employed in this study. Among the samples with Al-doped ZnO, ITO, and TiN conducting underlayers, the TiN sample yields the highest crystal quality: the (111) orientation fraction of 96% and the average grain size of approximately 100 µm. Therefore, the selection of the conducting underlayer material is significantly important to design advanced photovoltaic devices based on Ge thin films on glass.

Source:IOPscience

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Fabrication of high quality, thin Ge-on-insulator layers by direct wafer-bonding for nanostructured thermoelectric devices

A simple means of fabricating thin Ge-on-insulator layers(GOI layers) with a strong bond at the Ge/SiO2interface through direct wafer-bonding is described. In this work, high quality Ge/SiO2 bonding was achieved under ambient air and at room temperature as a result of the extremely hydrophilic bonding surfaces obtained by chemical treatment prior to direct bonding. Based on the results of this work, the first-ever bonding mechanism between ammonium hydroxide treated Ge and SiO2/Si wafer surfaces is proposed. In addition, strain generated during post-annealing as a consequence of the significant thermal-expansion mismatch between Ge and SiO2 was gradually relieved by applying a multistep-cooling process. Structural characteristics of the thin GOI layer were analyzed by cross-sectional scanning electron microscopy, Raman spectroscopy, x-ray diffraction and transmission electron microscopy. It was determined that direct wafer-bonding followed by polishing could produce a GOI layer as thin as 156 nm, with sub-nm surface roughness.

Source:IOPscience

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