Ultrathin-body Ge-on-insulator wafers fabricated with strongly bonded thin Al2O3/SiO2 hybrid buried oxide layers

An ultrathin-body Ge-on-insulator wafer(GeOI wafer) having a bonded thin Al2O3/SiO2 hybrid buried oxide layer was fabricated using an epitaxially grown Ge film on Si as a Ge donor layer. The epitaxial Ge film was confirmed to have a negligibly low density of crystal-defect-induced p-type carriers and was successfully transferred to form the GeOI wafer. Strong Al2O3/SiO2 bonding effectively suppressed Ge exfoliation during the wafering process. The obtained device-grade GeOI layer and strong bonding strength between Al2O3 and SiO2 are potentially advantageous for future Si-based complementary metal–insulator–semiconductor (CMIS) fabrication processes utilizing large-diameter Si wafers.



Source:IOPscience

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High-quality Ge epilayers grown on a Si substrate in one step process via hot wire chemical vapor deposition

High-quality Ge epilayers on Si with a low threading-dislocation density (TDD) were grown by a one step hot wire chemical vapor deposition process at 350°C without cyclic thermal annealing. The Ge layers with threading dislocation density (TDD) of 1-105 cm-2 for a 1.4 μm thick Ge layer were obtained on Si wafers of a diameter Ø = 5 cm. Root mean square of roughness (RMS) of ~ 0.37 nm is achieved. The Ge layers produced are of high optical quality.


Source:IOPscience

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Bubble evolution mechanism and stress-induced crystallization in low-temperature silicon wafer bonding based on a thin intermediate amorphous Ge layer

The dependence of the morphology and crystallinity of an amorphous Ge (a-Ge) interlayer between two Si wafers on the annealing temperature is identified to understand the bubble evolution mechanism. The effect of a-Ge layer thickness on the bubble density and size at different annealing temperatures is also clearly clarified. It suggests that the bubble density is significantly affected by the crystallinity and thickness of the a-Ge layer. With the increase of the crystallinity and thickness of the a-Ge layer, the bubble density decreases. It is important that a near-bubble-free Ge interface, which is also an oxide-free interface, is achieved when the bonded Si wafers (a-Ge layer thickness  ≥  20 nm) are annealed at 400 °C. Furthermore, the crystallization temperature of the a-Ge between the bonded Si wafers is lower than that on a Si substrate alone and the Ge grains firstly form at the Ge/Ge bonded interface, rather than the Ge/Si interface. We believe that the stress-induced crystallization of a-Ge film and the intermixing of Ge atoms at the Ge/Ge interface can be responsible for this feature.


Source:IOPscience

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Room-temperature direct bonding of germanium wafers by surface-activated bonding method

This paper reports the mechanical and electrical characteristics of Ge/Ge interfaces prepared by room-temperature surface-activated bonding (SAB). Bonded Ge/Ge wafer pairs with high bonding strength equivalent to that of the bulk material were achieved without any heat treatment. It was found that the bonding of Ge wafers was not sensitive to the background vacuum pressure in a wafer-bonding chamber compared with the bonding of Si wafers. The current–voltage characteristics and microstructures of bonded interfaces formed by SAB and low-temperature plasma activation bonding (PAB) were compared. It was demonstrated that junctions with very low resistivity can be obtained by SAB at room temperature.



Source:IOPscience

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